Introduction
Capacitors are equally vital in RF and microwave circuits, enabling critical functions like DC blocking, impedance matching, and harmonic filtering. However, their high-frequency performance is constrained by parasitic inductance inherent in real-world implementations. For capacitors, the self-resonant frequency (SRF) marks the point where parasitic inductance resonates with the intended capacitance, transforming the component into an inductive element.
In GaAs MMIC technology, these parasitics are exacerbated by substrate coupling and geometric constraints. This blog explores how SRF governs capacitor usability, analyzes parasitic inductance effects, and compares two MIM (Metal-Insulator-Metal) capacitors (3 pF and 6 pF) to demonstrate trade-offs in high-frequency capacitor design.
Key Points
GaAs MMIC Limitations:
Parasitic inductance arises from current paths in capacitor plates and interconnects.
Thinner GaAs substrates (100 µm) increase fringing fields, worsening capacitive coupling to ground.
SRF Equation for Capacitors:
SRF=12πLp⋅C
Where Lp is parasitic inductance and is nominal capacitance.
Design Trade-offs:
Larger capacitors (6 pF) exhibit lower SRF due to increased plate area and parasitic inductance.
Compensation techniques can mitigate parasitics but add complexity.
Experimental Setup
To investigate the self-resonant frequency (SRF) behavior of integrated capacitors, we designed and simulated two MIM (Metal-Insulator-Metal) capacitors in the same GaAs MMIC technology. The two capacitors were designed with nominal values of 3 pF (C1) and 6 pF (C2), each terminated with 50 Ω ports at both ends to accurately emulate real-world measurement conditions.
The electromagnetic simulations were performed using the Momentum Microwave EM simulator, which is well-suited for analyzing passive planar structures and their parasitic effects. The frequency sweep was set from 0 to 20 GHz, and the mesh density was configured at 50 cells per wavelength. This high mesh resolution ensures precise modeling of the distributed capacitance, parasitic inductance, and coupling effects that are especially significant at high frequencies.
After simulation, we extracted the effective capacitance (Ceff) for both capacitors using parameter extraction equations (see image below for the equations used). The extracted Ceff values were then plotted against frequency to visualize how the capacitance varies and to identify the SRF for each device.
A comparative plot was also generated, showing Ceff1 (Red, 3 pF capacitor) and Ceff2 (Blue, 6 pF capacitor) together. This plot clearly illustrates that the 3 pF capacitor (C1) has a higher SRF at 13 GHz, while the 6 pF capacitor (C2) exhibits a lower SRF at 8 GHz. The difference in SRF highlights the impact of increasing capacitance-and thus parasitic inductance-on high-frequency performance.
